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Pure FPGA Market Data Solutions

NovaSparks Platform

Why “Pure FPGA”?


NovaSparks Platform Overview

Could the NovaSparks platform give you a trading edge? If your trading strategy relies on ultra-fast, deterministic and reliable access to the market data, there is no alternative.

Software feed handler solutions rely exclusively on CPUs to handle market data and are not capable to offer the lowest latency, especially during market spikes. Memory bottlenecks, operating system overheads, poor parallelism, compiler limitations and slow networking stacks are among the many factors constraining performance and causing long tails in the processing latency distribution.

Hybrid feed handler solutions are using hardware off-load techniques to help the CPU cope with market data bursts. Still, in many cases, the bulk of the processing is carried out by the CPU, hence the improvements in latency are rather limited. As a matter of fact, these hybrids systems are heavily affected by the inherent bottlenecks of a traditional CPU centric architecture and scale only by further sharing the CPU.  Thus, the performance degrades when data rates increase, when more feeds are being processed, or when more distribution interfaces are added.

The NovaSparks feed handler solution is based on a pure FPGA architecture where all the real-time market data processing functions are performed in hardware, hence providing the lowest latency and highest determinism. There is no switch, NIC card, CPU with networking stack to cross resulting in one to two orders of magnitude faster processing during market bursts than what is achievable with traditional software-based solutions. Further, the pure FPGA approach offers higher resiliency due to the static and self-contained nature of the FPGA environment.

 Data Processing  NovaSparks
 A/B Feed Arbitrage  FPGA
 Decoding and Parsing  FPGA
 Order and Level Management  FPGA
 Book Building  FPGA
 Normalization  FPGA
 Replication and Distribution  FPGA
 Exchange Recovery Functions  CPU

Key Advantages

  • A pure FPGA feed handler is immune to data bursts, maintaining sub-microsecond latencies even during market data spikes.
  • A pure FPGA design eliminates the bottlenecks experienced in conventional software and hybrid systems.
  • The design merges line handling, order book building with management and data distribution functions and is engineered to scale across markets and consumers.
  • High resiliency is possible since the FPGA is not affected by the various software changes/updates typically required in a trading infrastructure.

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